1. Field of the Invention
The present invention relates to a method capable of facilitating reliably accessing flash memory, and more particularly, a method capable of facilitating reliably accessing flash memory by coding on writing process, decoding on reading process and comparing the first and the second error correction codes.
2. Description of the Related Art
Flash memory is widely used in a computer host or consumer electronic products, such as USB portable devices, MP3 players. However, considering the present technology, flash memory block may fail to access when in excess of 100,000 times of erasures and the block is considered to be worn out.
On account of a limited life of flash memory, it is an important subject to accurately read out data when some flash-memory block is worn out. There are two kinds of resolutions: One resolution utilizes improvements of hardware to facilitate the reliability of flash memory; the other resolution is to correct errors by means of Error Correction Code (ECC), yet this is limited to the size of spare area of flash-memory page. Regarding a page of 512 bytes, a 24-bit ECC is essential for detection of 2 bits error, and correction of 1 bit error. That is, few bits are allowed to be erred, thereby restricting the ability to error-correcting, and reliability and efficiency of data access.
As shown in FIG. 1 depicting a structure of a conventional flash-memory page, when data Al is written into data area A2, an ECC A3 is simultaneously stored into the spare area A4. It is more unreliable for such structure for use in a Multi-Level Cell (MLC) flash memory. Despite a cell of the MLC flash memory could store two or more bits, but this raises the possibility of misreading the values of bits. Although expanding a used number of spare area to supply more ECC space may improve above-mentioned problem, a substantial investment for upgrading present system and hardware is also necessary; therefore, it is not beneficial in doing this way.
Furthermore, for efficient usage of flash memory, one way is to monitor times of erasure to each flash block. If the number of erasure times for a block is close to 100,000, data will not be overwritten into the block. Monitoring each block must utilize substantial system resources and memory capacity, but not all blocks will be worn out when erased over 100,000 times, on the contrary, part blocks may not be accessible, as erased with less than 100,000 times. In other words, monitoring each block fails to completely reflect whether each block is useable, and possibly resulting in a waste of flash memory because of suspicious reliability.
Despite Taiwan Patent No. 575806 proposes an enhancement to error correction of flash memory, yet it still does not overcome the problem of low tolerance of two bits and failure to reflect whether each block is useable. Therefore, the situation of misreading remains.